diff options
| author | Keith Busch <[email protected]> | 2024-09-04 14:48:50 -0700 |
|---|---|---|
| committer | Keith Busch <[email protected]> | 2024-09-24 23:35:10 -0700 |
| commit | 9064610348b16356d43e59e286aedfec31825541 (patch) | |
| tree | b0b362f5e8e96e2d763f23957598046576341f10 | |
| parent | 83340d9c6178107df581c3ebbae0e28d0b15e879 (diff) | |
nvme: remove CC register read-back during enabling
Any non-posted read should flush the previous write, so we don't
necessarily need to read back the value we just wrote. I've found at
least some controllers that respond with 0 for short moments after
writing the CC register with EN (enable) cleared, so the read-back is
overwriting our valid ctrl_config value and ends up breaking on the
subsequent enabling.
Reviewed-by: Christoph Hellwig <[email protected]>
Signed-off-by: Keith Busch <[email protected]>
| -rw-r--r-- | drivers/nvme/host/core.c | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/drivers/nvme/host/core.c b/drivers/nvme/host/core.c index ca9959a8fb9e..ba6508455e18 100644 --- a/drivers/nvme/host/core.c +++ b/drivers/nvme/host/core.c @@ -2468,11 +2468,6 @@ int nvme_enable_ctrl(struct nvme_ctrl *ctrl) if (ret) return ret; - /* Flush write to device (required if transport is PCI) */ - ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CC, &ctrl->ctrl_config); - if (ret) - return ret; - /* CAP value may change after initial CC write */ ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap); if (ret) |