diff options
| author | Tero Kristo <[email protected]> | 2014-08-26 11:51:38 +0300 |
|---|---|---|
| committer | Tony Lindgren <[email protected]> | 2014-08-26 13:04:00 -0700 |
| commit | 8fd46439e1f5a7f86d76a08733459b74debd9468 (patch) | |
| tree | 1216a8868fdcff236a01a075c38a514f97a9e9d4 | |
| parent | cc824534d4fef0e46e4486d5c1e10d3c6b1ebadc (diff) | |
ARM: dts: omap54xx-clocks: Fix the l3 and l4 clock rates
Similarly to DRA7, OMAP5 has l3 and l4 clock rates incorrectly calculated.
Fixed by using proper divider clock types for the clock nodes.
Signed-off-by: Tero Kristo <[email protected]>
Reported-by: Tomi Valkeinen <[email protected]>
Tested-by: Tomi Valkeinen <[email protected]>
Signed-off-by: Tony Lindgren <[email protected]>
| -rw-r--r-- | arch/arm/boot/dts/omap54xx-clocks.dtsi | 16 |
1 files changed, 10 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi b/arch/arm/boot/dts/omap54xx-clocks.dtsi index e67a23b5d788..58c27466f012 100644 --- a/arch/arm/boot/dts/omap54xx-clocks.dtsi +++ b/arch/arm/boot/dts/omap54xx-clocks.dtsi @@ -367,10 +367,12 @@ l3_iclk_div: l3_iclk_div { #clock-cells = <0>; - compatible = "fixed-factor-clock"; + compatible = "ti,divider-clock"; + ti,max-div = <2>; + ti,bit-shift = <4>; + reg = <0x100>; clocks = <&dpll_core_h12x2_ck>; - clock-mult = <1>; - clock-div = <1>; + ti,index-power-of-two; }; gpu_l3_iclk: gpu_l3_iclk { @@ -383,10 +385,12 @@ l4_root_clk_div: l4_root_clk_div { #clock-cells = <0>; - compatible = "fixed-factor-clock"; + compatible = "ti,divider-clock"; + ti,max-div = <2>; + ti,bit-shift = <8>; + reg = <0x100>; clocks = <&l3_iclk_div>; - clock-mult = <1>; - clock-div = <1>; + ti,index-power-of-two; }; slimbus1_slimbus_clk: slimbus1_slimbus_clk { |