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authorSamson Tam <[email protected]>2019-10-23 21:36:29 -0400
committerAlex Deucher <[email protected]>2019-11-19 10:12:52 -0500
commit8d8a6af71a75e09ce5796b4ae780818865832c50 (patch)
treef0fbf41c9c9dcbb5b5fe711c30306cf00cb838ec
parent7b23b0b450720ab85f582d2c7692172b41d74457 (diff)
drm/amd/display: Fix stereo with DCC enabled
[Why] When sending DCC with Stereo, DCC gets enabled but the meta addresses are 0. This happens momentarily before the meta addresses are populated with a valid address. [How] Add call validate_dcc_with_meta_address() in copy_surface_update_to_plane() to check for surface address and DCC change. When DCC has changed, check if DCC enable is true but meta address is 0. If so, we turn DCC enable to false. When surface address has changed, we check if DCC enable is false but meta address is not 0. If so, we turn DCC enable back to true. This will restore DCC enable to the proper setting once the meta address is valid. Signed-off-by: Samson Tam <[email protected]> Reviewed-by: Jun Lei <[email protected]> Acked-by: Rodrigo Siqueira <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
-rw-r--r--drivers/gpu/drm/amd/display/dc/core/dc.c27
1 files changed, 27 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 7f796a4c73d4..c3a315f1d5f8 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -1747,12 +1747,37 @@ static struct dc_stream_status *stream_get_status(
static const enum surface_update_type update_surface_trace_level = UPDATE_TYPE_FULL;
+static void validate_dcc_with_meta_address(
+ struct dc_plane_dcc_param *dcc,
+ struct dc_plane_address *address)
+{
+ if ((address->grph.meta_addr.quad_part == 0) &&
+ dcc->enable) {
+ ASSERT(!dcc->enable);
+ dcc->enable = false;
+ } else if ((address->grph.meta_addr.quad_part != 0) &&
+ !dcc->enable)
+ dcc->enable = true;
+
+ if (address->type != PLN_ADDR_TYPE_GRAPHICS) {
+ if ((address->grph_stereo.right_meta_addr.quad_part == 0) &&
+ dcc->enable) {
+ ASSERT(!dcc->enable);
+ dcc->enable = false;
+ } else if ((address->grph_stereo.right_meta_addr.quad_part != 0) &&
+ !dcc->enable)
+ dcc->enable = true;
+ }
+}
+
static void copy_surface_update_to_plane(
struct dc_plane_state *surface,
struct dc_surface_update *srf_update)
{
if (srf_update->flip_addr) {
surface->address = srf_update->flip_addr->address;
+ validate_dcc_with_meta_address(&surface->dcc, &surface->address);
+
surface->flip_immediate =
srf_update->flip_addr->flip_immediate;
surface->time.time_elapsed_in_us[surface->time.index] =
@@ -1801,6 +1826,8 @@ static void copy_surface_update_to_plane(
srf_update->plane_info->global_alpha_value;
surface->dcc =
srf_update->plane_info->dcc;
+ validate_dcc_with_meta_address(&surface->dcc, &surface->address);
+
surface->sdr_white_level =
srf_update->plane_info->sdr_white_level;
surface->layer_index =