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authorGabor Juhos <[email protected]>2024-03-11 19:45:20 +0100
committerBjorn Andersson <[email protected]>2024-04-21 12:15:36 -0500
commit8c48466cd7eda9afb37f26c8c9a68f39fae5ef32 (patch)
treeab06d78081daac539f882c267f2ea962c7db89ca
parent4f2bc4acbb1916b8cd2ce4bb3ba7b1cd7cb705fa (diff)
clk: qcom: clk-alpha-pll: reorder Stromer register offsets
The register offset arrays are ordered based on the register offsets for all PLLs but the Stromer. For consistency, reorder the Stromer specific array as well. No functional changes. Signed-off-by: Gabor Juhos <[email protected]> Reviewed-by: Konrad Dybcio <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Bjorn Andersson <[email protected]>
-rw-r--r--drivers/clk/qcom/clk-alpha-pll.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
index acb68ec0c579..7f0ed5bd51e3 100644
--- a/drivers/clk/qcom/clk-alpha-pll.c
+++ b/drivers/clk/qcom/clk-alpha-pll.c
@@ -213,9 +213,9 @@ const u8 clk_alpha_pll_regs[][PLL_OFF_MAX_REGS] = {
[PLL_OFF_USER_CTL] = 0x18,
[PLL_OFF_USER_CTL_U] = 0x1c,
[PLL_OFF_CONFIG_CTL] = 0x20,
+ [PLL_OFF_STATUS] = 0x28,
[PLL_OFF_TEST_CTL] = 0x30,
[PLL_OFF_TEST_CTL_U] = 0x34,
- [PLL_OFF_STATUS] = 0x28,
},
[CLK_ALPHA_PLL_TYPE_STROMER_PLUS] = {
[PLL_OFF_L_VAL] = 0x04,