diff options
| author | Tejas Upadhyay <[email protected]> | 2023-11-23 16:09:00 +0530 |
|---|---|---|
| committer | Rodrigo Vivi <[email protected]> | 2023-12-21 11:44:56 -0500 |
| commit | 8bfbe174d7fabf4c6d26e90a133b3129c4e98cbe (patch) | |
| tree | cbe202b480039d37f85dfae43c1ecd3797e5691e | |
| parent | f25d8291aca1ccfb0118ec4c0e98f6301bff15ec (diff) | |
drm/xe/xe2: Add workaround 14019449301
This workaround applies to Xe2_LPM
V3(MattR):
- Reorder reg and wa placement
- Add base parameter to reg macro for better definition
V2(MattR):
- Change name of register
- Loop for all engines
- Driver permanent WA, applies to all steps
Reviewed-by: Matt Roper <[email protected]>
Signed-off-by: Tejas Upadhyay <[email protected]>
Signed-off-by: Rodrigo Vivi <[email protected]>
| -rw-r--r-- | drivers/gpu/drm/xe/regs/xe_engine_regs.h | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/xe/xe_wa.c | 5 |
2 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/xe/regs/xe_engine_regs.h b/drivers/gpu/drm/xe/regs/xe_engine_regs.h index b57dec17eb2d..444ff9b83bb1 100644 --- a/drivers/gpu/drm/xe/regs/xe_engine_regs.h +++ b/drivers/gpu/drm/xe/regs/xe_engine_regs.h @@ -112,6 +112,9 @@ #define RING_EXECLIST_CONTROL(base) XE_REG((base) + 0x550) #define EL_CTRL_LOAD REG_BIT(0) +#define VDBOX_CGCTL3F08(base) XE_REG((base) + 0x3f08) +#define CG3DDISHRS_CLKGATE_DIS REG_BIT(5) + #define VDBOX_CGCTL3F10(base) XE_REG((base) + 0x3f10) #define IECPUNIT_CLKGATE_DIS REG_BIT(22) diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c index 5ab5529d9624..81ae0232146e 100644 --- a/drivers/gpu/drm/xe/xe_wa.c +++ b/drivers/gpu/drm/xe/xe_wa.c @@ -287,6 +287,11 @@ static const struct xe_rtp_entry_sr gt_was[] = { XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F1C(0), MFXPIPE_CLKGATE_DIS)), XE_RTP_ENTRY_FLAG(FOREACH_ENGINE), }, + { XE_RTP_NAME("14019449301"), + XE_RTP_RULES(MEDIA_VERSION(2000), ENGINE_CLASS(VIDEO_DECODE)), + XE_RTP_ACTIONS(SET(VDBOX_CGCTL3F08(0), CG3DDISHRS_CLKGATE_DIS)), + XE_RTP_ENTRY_FLAG(FOREACH_ENGINE), + }, {} }; |