diff options
| author | Manivannan Sadhasivam <[email protected]> | 2023-03-07 21:02:01 +0530 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2023-03-09 13:10:53 -0800 |
| commit | 8ba961d4339c5db0e69ff6627606fe1f34c838e5 (patch) | |
| tree | 91242b55ee478431551e5e41d58bed74510a0b92 | |
| parent | e607b3c1fa0e1579951acd00f9559a77f97d0927 (diff) | |
arm64: dts: qcom: sm8450: Mark UFS controller as cache coherent
The UFS controller on SM8450 supports cache coherency, hence add the
"dma-coherent" property to mark it as such.
Fixes: 07fa917a335e ("arm64: dts: qcom: sm8450: add ufs nodes")
Signed-off-by: Manivannan Sadhasivam <[email protected]>
Reviewed-by: Neil Armstrong <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sm8450.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi index e77d188508fd..b285b1530c10 100644 --- a/arch/arm64/boot/dts/qcom/sm8450.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi @@ -4003,6 +4003,7 @@ power-domains = <&gcc UFS_PHY_GDSC>; iommus = <&apps_smmu 0xe0 0x0>; + dma-coherent; interconnects = <&aggre1_noc MASTER_UFS_MEM 0 &mc_virt SLAVE_EBI1 0>, <&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_UFS_MEM_CFG 0>; |