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authorKrishna chaitanya chundru <[email protected]>2023-02-28 17:19:12 +0530
committerBjorn Andersson <[email protected]>2023-03-06 20:17:10 -0800
commit8a63441e83724fee1ef3fd37b237d40d90780766 (patch)
treeb39136da5248498f9c29e6ea0d8639b518997308
parenteaba416688f4f074ea3bf2ef975c9e2dbb06712b (diff)
arm64: dts: qcom: sc7280: Mark PCIe controller as cache coherent
If the controller is not marked as cache coherent, then kernel will try to ensure coherency during dma-ops and that may cause data corruption. So, mark the PCIe node as dma-coherent as the devices on PCIe bus are cache coherent. Cc: [email protected] Fixes: 92e0ee9f83b3 ("arm64: dts: qcom: sc7280: Add PCIe and PHY related node") Signed-off-by: Krishna chaitanya chundru <[email protected]> Signed-off-by: Bjorn Andersson <[email protected]> Link: https://lore.kernel.org/r/[email protected]
-rw-r--r--arch/arm64/boot/dts/qcom/sc7280.dtsi2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index bdcb74925313..8f4ab6bd2886 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2131,6 +2131,8 @@
pinctrl-names = "default";
pinctrl-0 = <&pcie1_clkreq_n>;
+ dma-coherent;
+
iommus = <&apps_smmu 0x1c80 0x1>;
iommu-map = <0x0 &apps_smmu 0x1c80 0x1>,