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authorPaulo Zanoni <[email protected]>2014-08-21 17:09:36 -0300
committerDaniel Vetter <[email protected]>2014-09-03 11:04:20 +0200
commit89d6b2b81fdfa57666188d63dc970f8f14efed71 (patch)
treee56148e6fccb5bbffcb75124461a7d9424ebbd29
parentec49ba2d709f3a1a4cd822e547db2f07e121b375 (diff)
drm/i915: call lpt_init_clock_gating on BDW too
Because BDW has WPT, which is equivalent to LPT. This is just like the CPT/PPT case. Signed-off-by: Paulo Zanoni <[email protected]> Reviewed-by: Damien Lespiau <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index a381c9997a25..88944607b3a7 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -5607,6 +5607,8 @@ static void gen8_init_clock_gating(struct drm_device *dev)
/* Wa4x4STCOptimizationDisable:bdw */
I915_WRITE(CACHE_MODE_1,
_MASKED_BIT_ENABLE(GEN8_4x4_STC_OPTIMIZATION_DISABLE));
+
+ lpt_init_clock_gating(dev);
}
static void haswell_init_clock_gating(struct drm_device *dev)