diff options
| author | Matthew Gerlach <[email protected]> | 2020-07-13 14:10:03 +0800 |
|---|---|---|
| committer | Moritz Fischer <[email protected]> | 2020-07-13 22:11:17 -0700 |
| commit | 8614afd689df59d9ce019439389be20bd788a897 (patch) | |
| tree | bfc0381e299391100ee1a895c0634585dd5cdf03 | |
| parent | e19485dc7a0d210b428a249c0595769bd495fb71 (diff) | |
fpga: dfl: fix bug in port reset handshake
When putting the port in reset, driver must wait for the soft reset
acknowledgment bit instead of the soft reset bit.
Fixes: 47c1b19c160f (fpga: dfl: afu: add port ops support)
Signed-off-by: Matthew Gerlach <[email protected]>
Signed-off-by: Xu Yilun <[email protected]>
Acked-by: Wu Hao <[email protected]>
Reviewed-by: Tom Rix <[email protected]>
Signed-off-by: Moritz Fischer <[email protected]>
| -rw-r--r-- | drivers/fpga/dfl-afu-main.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/fpga/dfl-afu-main.c b/drivers/fpga/dfl-afu-main.c index b0c31789a909..3fa2c5992173 100644 --- a/drivers/fpga/dfl-afu-main.c +++ b/drivers/fpga/dfl-afu-main.c @@ -83,7 +83,8 @@ int __afu_port_disable(struct platform_device *pdev) * on this port and minimum soft reset pulse width has elapsed. * Driver polls port_soft_reset_ack to determine if reset done by HW. */ - if (readq_poll_timeout(base + PORT_HDR_CTRL, v, v & PORT_CTRL_SFTRST, + if (readq_poll_timeout(base + PORT_HDR_CTRL, v, + v & PORT_CTRL_SFTRST_ACK, RST_POLL_INVL, RST_POLL_TIMEOUT)) { dev_err(&pdev->dev, "timeout, fail to reset device\n"); return -ETIMEDOUT; |