diff options
| author | Devi Priya <[email protected]> | 2023-04-06 11:43:13 +0530 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2023-05-26 12:16:55 -0700 |
| commit | 84c4a652db1cf764ebaeea56e6e3372cc52bf708 (patch) | |
| tree | 43fd24f01cfa14b747f480ffcb2cde45de56147a | |
| parent | d9556c5c6c51aad2c2f760ce953735afa9162f94 (diff) | |
arm64: dts: qcom: ipq9574: Add support for APSS clock controller
Add the APCS & A73 PLL nodes to support CPU frequency scaling.
Signed-off-by: Devi Priya <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
| -rw-r--r-- | arch/arm64/boot/dts/qcom/ipq9574.dtsi | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi index fea15f3cf910..b751d2a5b5b6 100644 --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi @@ -422,6 +422,24 @@ timeout-sec = <30>; }; + apcs_glb: mailbox@b111000 { + compatible = "qcom,ipq9574-apcs-apps-global", + "qcom,ipq6018-apcs-apps-global"; + reg = <0x0b111000 0x1000>; + #clock-cells = <1>; + clocks = <&a73pll>, <&xo_board_clk>; + clock-names = "pll", "xo"; + #mbox-cells = <1>; + }; + + a73pll: clock@b116000 { + compatible = "qcom,ipq9574-a73pll"; + reg = <0x0b116000 0x40>; + #clock-cells = <0>; + clocks = <&xo_board_clk>; + clock-names = "xo"; + }; + timer@b120000 { compatible = "arm,armv7-timer-mem"; reg = <0x0b120000 0x1000>; |