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authorMichał Winiarski <[email protected]>2017-01-11 16:17:39 +0100
committerChris Wilson <[email protected]>2017-01-12 10:52:39 +0000
commit83796f2652bc31170eee5563e37c6af92db41de9 (patch)
treeb11abe402b9013cae4b5dc25b0b32588858b0d31
parentdd48e8ed3bfdee879ce60508230bed7fb2ca5fa8 (diff)
drm/i915/guc: Make sure vma containing firmware is GuC mappable
Since commit 4741da925fa3 ("drm/i915/guc: Assert that all GGTT offsets used by the GuC are mappable"), we're asserting that GuC firmware is in the GuC mappable range. Except we're not pinning the object with bias, which means it's possible to trigger this assert. Let's add a proper bias. Fixes: 4741da925fa3 ("drm/i915/guc: Assert that all GGTT offsets used by the GuC are mappable") Cc: Chris Wilson <[email protected]> Cc: Daniele Ceraolo Spurio <[email protected]> Signed-off-by: Michał Winiarski <[email protected]> Reviewed-by: Chris Wilson <[email protected]> Tested-by: Tomi Sarvela <[email protected]> Signed-off-by: Chris Wilson <[email protected]> Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
-rw-r--r--drivers/gpu/drm/i915/intel_guc_loader.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c b/drivers/gpu/drm/i915/intel_guc_loader.c
index aa2b866474be..5a6ab8728d48 100644
--- a/drivers/gpu/drm/i915/intel_guc_loader.c
+++ b/drivers/gpu/drm/i915/intel_guc_loader.c
@@ -360,7 +360,8 @@ static int guc_ucode_xfer(struct drm_i915_private *dev_priv)
return ret;
}
- vma = i915_gem_object_ggtt_pin(guc_fw->guc_fw_obj, NULL, 0, 0, 0);
+ vma = i915_gem_object_ggtt_pin(guc_fw->guc_fw_obj, NULL, 0, 0,
+ PIN_OFFSET_BIAS | GUC_WOPCM_TOP);
if (IS_ERR(vma)) {
DRM_DEBUG_DRIVER("pin failed %d\n", (int)PTR_ERR(vma));
return PTR_ERR(vma);