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authorPierre-Louis Bossart <[email protected]>2024-03-26 09:20:25 +0000
committerVinod Koul <[email protected]>2024-04-05 17:21:03 +0530
commit7eca9c722eed80f76cd272a52d9fa98f89322e7e (patch)
tree058252e4286bbeecc112b7fe2bbf07615ae20e8c
parent8292c815bbb71ea9f86331c3d07d2b9530b93565 (diff)
soundwire: bus: extend base clock checks to 96 MHz
Starting with MeteorLake, the input frequency to the SoundWire IP can be 96MHz. The existing code is limited to 24MHz, change accordingly and move branch after the 32MHz case to avoid issues. While we're at it, reorder the frequencies by increasing order. Signed-off-by: Pierre-Louis Bossart <[email protected]> Reviewed-by: Rander Wang <[email protected]> Signed-off-by: Bard Liao <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
-rw-r--r--drivers/soundwire/bus.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/soundwire/bus.c b/drivers/soundwire/bus.c
index 05b2db00d9cd..191e6cc6f962 100644
--- a/drivers/soundwire/bus.c
+++ b/drivers/soundwire/bus.c
@@ -1312,18 +1312,18 @@ static int sdw_slave_set_frequency(struct sdw_slave *slave)
if (!(19200000 % mclk_freq)) {
mclk_freq = 19200000;
base = SDW_SCP_BASE_CLOCK_19200000_HZ;
- } else if (!(24000000 % mclk_freq)) {
- mclk_freq = 24000000;
- base = SDW_SCP_BASE_CLOCK_24000000_HZ;
- } else if (!(24576000 % mclk_freq)) {
- mclk_freq = 24576000;
- base = SDW_SCP_BASE_CLOCK_24576000_HZ;
} else if (!(22579200 % mclk_freq)) {
mclk_freq = 22579200;
base = SDW_SCP_BASE_CLOCK_22579200_HZ;
+ } else if (!(24576000 % mclk_freq)) {
+ mclk_freq = 24576000;
+ base = SDW_SCP_BASE_CLOCK_24576000_HZ;
} else if (!(32000000 % mclk_freq)) {
mclk_freq = 32000000;
base = SDW_SCP_BASE_CLOCK_32000000_HZ;
+ } else if (!(96000000 % mclk_freq)) {
+ mclk_freq = 24000000;
+ base = SDW_SCP_BASE_CLOCK_24000000_HZ;
} else {
dev_err(&slave->dev,
"Unsupported clock base, mclk %d\n",