diff options
| author | Miquel Raynal <[email protected]> | 2019-12-24 15:38:59 +0100 |
|---|---|---|
| committer | Heiko Stuebner <[email protected]> | 2020-01-06 12:38:46 +0100 |
| commit | 7e90ccec8c3cb34bca633dea9c38e99d79daa3a9 (patch) | |
| tree | e154f863a39f754dfe7e9bbf5f8ca6dd92d72def | |
| parent | 4f279f9fbca54464173240f7e73b145a136dfa1e (diff) | |
arm64: dts: rockchip: Add PX30 DSI DPHY
Add the PHY which outputs MIPI DSI and LVDS.
Signed-off-by: Miquel Raynal <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[added dsi power-domain, following vendor-kernel]
Signed-off-by: Heiko Stuebner <[email protected]>
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/px30.dtsi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi index c31423f36192..5b5ca7ff6674 100644 --- a/arch/arm64/boot/dts/rockchip/px30.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi @@ -820,6 +820,18 @@ }; }; + dsi_dphy: phy@ff2e0000 { + compatible = "rockchip,px30-dsi-dphy"; + reg = <0x0 0xff2e0000 0x0 0x10000>; + clocks = <&pmucru SCLK_MIPIDSIPHY_REF>, <&cru PCLK_MIPIDSIPHY>; + clock-names = "ref", "pclk"; + resets = <&cru SRST_MIPIDSIPHY_P>; + reset-names = "apb"; + #phy-cells = <0>; + power-domains = <&power PX30_PD_VO>; + status = "disabled"; + }; + usb20_otg: usb@ff300000 { compatible = "rockchip,px30-usb", "rockchip,rk3066-usb", "snps,dwc2"; |