diff options
author | Frank Li <[email protected]> | 2024-06-26 16:25:29 -0400 |
---|---|---|
committer | Shawn Guo <[email protected]> | 2024-07-01 22:21:45 +0800 |
commit | 7dcd914ba1e3caff3ddf2ac1123fd2651a676a17 (patch) | |
tree | 3b49e1a9e1263e23b1ef250ab64f4a575e8c947f | |
parent | cfd95678a6fc814f16c16e6dd62934d5c3528ab5 (diff) |
arm64: dts: layerscape: change pcie interrupt order
Change pcie interrupt order to fix below warning.
arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dtb: pcie@3400000: interrupt-names:0: 'pme' was expected
from schema $id: http://devicetree.org/schemas/pci/fsl,layerscape-pcie.yaml#
arch/arm64/boot/dts/freescale/fsl-ls1012a-frdm.dtb: pcie@3400000: interrupt-names:1: 'aer' was expected
from schema $id: http://devicetree.org/schemas/pci/fsl,layerscape-pcie.yaml#
Signed-off-by: Frank Li <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi | 6 | ||||
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 18 |
2 files changed, 12 insertions, 12 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi index 031a5fece5aa..e61ea7e0737e 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi @@ -535,9 +535,9 @@ reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */ <0x40 0x00000000 0x0 0x00002000>; /* configuration space */ reg-names = "regs", "config"; - interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */ - <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; /* PME interrupt */ - interrupt-names = "aer", "pme"; + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */ + <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */ + interrupt-names = "pme", "aer"; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi index 801c5b77d608..8ce73a076e77 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi @@ -801,9 +801,9 @@ reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */ <0x40 0x00000000 0x0 0x00002000>; /* configuration space */ reg-names = "regs", "config"; - interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */ - <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>; /* PME interrupt */ - interrupt-names = "aer", "pme"; + interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */ + <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */ + interrupt-names = "pme", "aer"; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; @@ -840,9 +840,9 @@ reg = <0x00 0x03500000 0x0 0x00100000>, /* controller registers */ <0x48 0x00000000 0x0 0x00002000>; /* configuration space */ reg-names = "regs", "config"; - interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */ - <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; /* PME interrupt */ - interrupt-names = "aer", "pme"; + interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */ + <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */ + interrupt-names = "pme", "aer"; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; @@ -879,9 +879,9 @@ reg = <0x00 0x03600000 0x0 0x00100000>, /* controller registers */ <0x50 0x00000000 0x0 0x00002000>; /* configuration space */ reg-names = "regs", "config"; - interrupts = <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */ - <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; /* PME interrupt */ - interrupt-names = "aer", "pme"; + interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */ + <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */ + interrupt-names = "pme", "aer"; #address-cells = <3>; #size-cells = <2>; device_type = "pci"; |