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authorAnimesh Manna <[email protected]>2015-08-04 22:02:42 +0530
committerDaniel Vetter <[email protected]>2015-09-23 09:42:10 +0200
commit7b403ffba8ed8636f3467a9008bd2e060792b2e4 (patch)
tree0ba5faf345dbad9de7e6a1192531b34cf2db682f
parentcff765fb1383dff6787fa735fcc88aa122d3c00d (diff)
drm/i915/bxt: Modified HAS_CSR, added support for BXT
Modified HAS_CSR macro defination which earlier only supported for skl, now added support for BXT. v1: Initial version. v2: Instaed of skylake/broxton check added gen9 check alone based on review comment from Sunil. Cc: Vetter, Daniel <[email protected]> Cc: Damien Lespiau <[email protected]> Cc: Imre Deak <[email protected]> Cc: Sunil Kamath <[email protected]> Signed-off-by: Animesh Manna <[email protected]> Reviewed-by: Imre Deak <[email protected]> Signed-off-by: Daniel Vetter <[email protected]>
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 677faa8be228..3795fdfcd1c3 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2578,7 +2578,7 @@ struct drm_i915_cmd_table {
#define HAS_RC6(dev) (INTEL_INFO(dev)->gen >= 6)
#define HAS_RC6p(dev) (INTEL_INFO(dev)->gen == 6 || IS_IVYBRIDGE(dev))
-#define HAS_CSR(dev) (IS_SKYLAKE(dev))
+#define HAS_CSR(dev) (IS_GEN9(dev))
#define HAS_GUC_UCODE(dev) (IS_GEN9(dev))
#define HAS_GUC_SCHED(dev) (IS_GEN9(dev))