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authorBard Liao <[email protected]>2014-12-15 15:42:34 +0800
committerMark Brown <[email protected]>2015-03-02 16:19:46 +0000
commit77e3ea2801c8ca4700e6b17053b625b8a981ac77 (patch)
tree3111f0391fb30f9c08e87d30bcd7a4539c7df134
parent64e89e5f55484d289c8b326521e5a12291e2283e (diff)
ASoC: rt5670: Keep sysclk on if JD func is used
System clock is necessary for rt5670 JD function. We assume system clock source will be set in machine driver. So there are two things left we should do in codec driver. 1. Set sysclk to codec internal clock in probe since machine driver may not do that before JD function is registered. 2. Power up PLL once sysclk source is switched to PLL. Signed-off-by: Bard Liao <[email protected]> Signed-off-by: Mark Brown <[email protected]>
-rw-r--r--sound/soc/codecs/rt5670.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/sound/soc/codecs/rt5670.c b/sound/soc/codecs/rt5670.c
index 78d85de8af6f..0a027bc94399 100644
--- a/sound/soc/codecs/rt5670.c
+++ b/sound/soc/codecs/rt5670.c
@@ -2190,6 +2190,13 @@ static int rt5670_set_dai_sysclk(struct snd_soc_dai *dai,
if (freq == rt5670->sysclk && clk_id == rt5670->sysclk_src)
return 0;
+ if (rt5670->pdata.jd_mode) {
+ if (clk_id == RT5670_SCLK_S_PLL1)
+ snd_soc_dapm_force_enable_pin(&codec->dapm, "PLL1");
+ else
+ snd_soc_dapm_disable_pin(&codec->dapm, "PLL1");
+ snd_soc_dapm_sync(&codec->dapm);
+ }
switch (clk_id) {
case RT5670_SCLK_S_MCLK:
reg_val |= RT5670_SCLK_SRC_MCLK;
@@ -2628,6 +2635,10 @@ static int rt5670_i2c_probe(struct i2c_client *i2c,
}
if (rt5670->pdata.jd_mode) {
+ regmap_update_bits(rt5670->regmap, RT5670_GLB_CLK,
+ RT5670_SCLK_SRC_MASK, RT5670_SCLK_SRC_RCCLK);
+ rt5670->sysclk = 0;
+ rt5670->sysclk_src = RT5670_SCLK_S_RCCLK;
regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG1,
RT5670_PWR_MB, RT5670_PWR_MB);
regmap_update_bits(rt5670->regmap, RT5670_PWR_ANLG2,