diff options
| author | Tero Kristo <[email protected]> | 2020-04-29 16:13:40 +0300 |
|---|---|---|
| committer | Stephen Boyd <[email protected]> | 2020-05-14 12:54:44 -0700 |
| commit | 74c0ac108d42bf24d37aaea68b6d39ba52d5f0e2 (patch) | |
| tree | 0e10b406ba4af105c0f2857ae6735c72ac1b5951 | |
| parent | c7c1cbbc9217ebb5601b88d138d4a5358548de9d (diff) | |
clk: ti: omap4: Add proper parent clocks for l4-secure clocks
L4 secure clocks do not have their parents set currently, which ends
them up to the orphan clock list. Fix this by adding either l3 or l4
clock as their parent.
Signed-off-by: Tero Kristo <[email protected]>
Link: https://lkml.kernel.org/r/[email protected]
Acked-by: Tony Lindgren <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
| -rw-r--r-- | drivers/clk/ti/clk-44xx.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/clk/ti/clk-44xx.c b/drivers/clk/ti/clk-44xx.c index 312a20f8ec0e..a38c92153979 100644 --- a/drivers/clk/ti/clk-44xx.c +++ b/drivers/clk/ti/clk-44xx.c @@ -606,13 +606,13 @@ static const struct omap_clkctrl_reg_data omap4_l4_per_clkctrl_regs[] __initcons static const struct omap_clkctrl_reg_data omap4_l4_secure_clkctrl_regs[] __initconst = { - { OMAP4_AES1_CLKCTRL, NULL, CLKF_SW_SUP, "" }, - { OMAP4_AES2_CLKCTRL, NULL, CLKF_SW_SUP, "" }, - { OMAP4_DES3DES_CLKCTRL, NULL, CLKF_SW_SUP, "" }, - { OMAP4_PKA_CLKCTRL, NULL, CLKF_SW_SUP, "" }, - { OMAP4_RNG_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_SOC_NONSEC, "" }, - { OMAP4_SHA2MD5_CLKCTRL, NULL, CLKF_SW_SUP, "" }, - { OMAP4_CRYPTODMA_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_SOC_NONSEC, "" }, + { OMAP4_AES1_CLKCTRL, NULL, CLKF_SW_SUP, "l3_div_ck" }, + { OMAP4_AES2_CLKCTRL, NULL, CLKF_SW_SUP, "l3_div_ck" }, + { OMAP4_DES3DES_CLKCTRL, NULL, CLKF_SW_SUP, "l4_div_ck" }, + { OMAP4_PKA_CLKCTRL, NULL, CLKF_SW_SUP, "l4_div_ck" }, + { OMAP4_RNG_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_SOC_NONSEC, "l4_div_ck" }, + { OMAP4_SHA2MD5_CLKCTRL, NULL, CLKF_SW_SUP, "l3_div_ck" }, + { OMAP4_CRYPTODMA_CLKCTRL, NULL, CLKF_HW_SUP | CLKF_SOC_NONSEC, "l3_div_ck" }, { 0 }, }; |