diff options
author | Sinthu Raja <[email protected]> | 2023-09-21 15:30:38 +0530 |
---|---|---|
committer | Vignesh Raghavendra <[email protected]> | 2023-10-05 20:44:41 +0530 |
commit | 73e8ec1b2d101fb030f6906c9d2799bea80e3804 (patch) | |
tree | 40ebef6653d5d7bbfad6044a10f94bc2b503f257 | |
parent | b024d1a853b7bc8e2e01aa9a219d81a9df1a2ceb (diff) |
arm64: dts: ti: k3-am68-sk: Add DT node for PCIe
AM68 Starter kit features with one PCIe M.2 Key M connector
interfaced via two SerDes lanes. Update the SerDes configuration
for PCIe.
Signed-off-by: Sinthu Raja <[email protected]>
Signed-off-by: Ravi Gunasekaran <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
-rw-r--r-- | arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts | 29 |
1 files changed, 29 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts index 5df5946687b3..81c2307c77f9 100644 --- a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts +++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts @@ -553,3 +553,32 @@ }; }; }; + +&serdes_ln_ctrl { + idle-states = <J721S2_SERDES0_LANE0_PCIE1_LANE0>, <J721S2_SERDES0_LANE1_PCIE1_LANE1>, + <J721S2_SERDES0_LANE2_USB_SWAP>, <J721S2_SERDES0_LANE3_USB>; +}; + +&serdes_refclk { + clock-frequency = <100000000>; +}; + +&serdes0 { + status = "okay"; + + serdes0_pcie_link: phy@0 { + reg = <0>; + cdns,num-lanes = <2>; + #phy-cells = <0>; + cdns,phy-type = <PHY_TYPE_PCIE>; + resets = <&serdes_wiz0 1>, <&serdes_wiz0 2>; + }; +}; + +&pcie1_rc { + status = "okay"; + reset-gpios = <&exp1 10 GPIO_ACTIVE_HIGH>; + phys = <&serdes0_pcie_link>; + phy-names = "pcie-phy"; + num-lanes = <2>; +}; |