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authorLijo Lazar <[email protected]>2023-01-17 16:54:49 +0530
committerAlex Deucher <[email protected]>2023-06-09 09:52:02 -0400
commit7389c75114c53b061d686f19dff5833adaf96cb8 (patch)
tree71abdc9e6d0b7207672b1621ef90ce098c5a1bec
parentb2ef2fdffed2a7fd5bf3f178a6a0427487dba5dd (diff)
drm/amdgpu: Keep SDMAv4.4.2 active during reset
During ASIC wide reset, SDMA shouldn't be clockgated and be ready to accept freeze requests from PMFW. For that, don't stop SDMA engine during reset and keep the clocks active. Signed-off-by: Lijo Lazar <[email protected]> Reviewed-by: Hawking Zhang <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
-rw-r--r--drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
index 7c91cbd91ac8..729e26a4a2e7 100644
--- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
+++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
@@ -566,6 +566,11 @@ static void sdma_v4_4_2_inst_enable(struct amdgpu_device *adev, bool enable,
sdma_v4_4_2_inst_rlc_stop(adev, inst_mask);
if (adev->sdma.has_page_queue)
sdma_v4_4_2_inst_page_stop(adev, inst_mask);
+
+ /* SDMA FW needs to respond to FREEZE requests during reset.
+ * Keep it running during reset */
+ if (!amdgpu_sriov_vf(adev) && amdgpu_in_reset(adev))
+ return;
}
for_each_inst(i, inst_mask) {
@@ -1435,6 +1440,9 @@ static int sdma_v4_4_2_suspend(void *handle)
{
struct amdgpu_device *adev = (struct amdgpu_device *)handle;
+ if (amdgpu_in_reset(adev))
+ sdma_v4_4_2_set_clockgating_state(adev, AMD_CG_STATE_UNGATE);
+
return sdma_v4_4_2_hw_fini(adev);
}