diff options
| author | Manasi Navare <[email protected]> | 2019-03-19 15:18:47 -0700 |
|---|---|---|
| committer | Manasi Navare <[email protected]> | 2019-03-20 12:08:40 -0700 |
| commit | 7264aebb81d15aa6bbed650c816bba90f026bc35 (patch) | |
| tree | 87baeb769bde7cfd8ec23a2e15b7b416734878c8 | |
| parent | 6e514e371757a62996881e94dd2a488b3e16d518 (diff) | |
drm/i915/icl: Fix the TRANS_DDI_FUNC_CTL2 bitfield macro
This patch fixes the PORT_SYNC_MODE_MASTER_SELECT macro
to correctly do the left shifting to set the port sync
master select correctly.
I have tested this fix on ICL.
Fixes: 49edbd49786e ("drm/i915/icl: Define TRANS_DDI_FUNC_CTL DSI registers")
Cc: Madhav Chauhan <[email protected]>
Cc: Jani Nikula <[email protected]>
Cc: <[email protected]> # v5.0+
Signed-off-by: Manasi Navare <[email protected]>
Reviewed-by: Jani Nikula <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
| -rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 85e8d1a1f70b..7a9d867eb49b 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -9352,7 +9352,7 @@ enum skl_power_gate { #define TRANS_DDI_FUNC_CTL2(tran) _MMIO_TRANS2(tran, \ _TRANS_DDI_FUNC_CTL2_A) #define PORT_SYNC_MODE_ENABLE (1 << 4) -#define PORT_SYNC_MODE_MASTER_SELECT(x) ((x) < 0) +#define PORT_SYNC_MODE_MASTER_SELECT(x) ((x) << 0) #define PORT_SYNC_MODE_MASTER_SELECT_MASK (0x7 << 0) #define PORT_SYNC_MODE_MASTER_SELECT_SHIFT 0 |