diff options
| author | Aswath Govindraju <[email protected]> | 2023-03-31 14:30:28 +0530 |
|---|---|---|
| committer | Vignesh Raghavendra <[email protected]> | 2023-06-14 16:12:19 +0530 |
| commit | 715084ecc25adafe7f724721807b64fcc3a13e4a (patch) | |
| tree | 269be045cf2c383b8094f76c285a2da5fc4194e6 | |
| parent | b6f18aa80f4eee59f9292f0007c021cb7e7dbbec (diff) | |
arm64: dts: ti: k3-j721s2-common-proc-board: Enable PCIe
x1 lane PCIe slot in the common processor board is enabled and connected to
J721S2 SOM. Add PCIe DT node in common processor board to reflect the
same.
Reviewed-by: Siddharth Vadapalli <[email protected]>
Signed-off-by: Aswath Govindraju <[email protected]>
Signed-off-by: Matt Ranostay <[email protected]>
Signed-off-by: Ravi Gunasekaran <[email protected]>
Reviewed-by: Roger Quadros <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vignesh Raghavendra <[email protected]>
| -rw-r--r-- | arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts index 9066d8bc34be..924e0dc4ac1e 100644 --- a/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts +++ b/arch/arm64/boot/dts/ti/k3-j721s2-common-proc-board.dts @@ -400,6 +400,14 @@ }; }; +&pcie1_rc { + status = "okay"; + reset-gpios = <&exp1 2 GPIO_ACTIVE_HIGH>; + phys = <&serdes0_pcie_link>; + phy-names = "pcie-phy"; + num-lanes = <1>; +}; + &mcu_mcan0 { status = "okay"; pinctrl-names = "default"; |