diff options
| author | Lee Jones <[email protected]> | 2016-04-21 17:07:00 +0200 |
|---|---|---|
| committer | Maxime Coquelin <[email protected]> | 2016-04-26 16:06:41 +0200 |
| commit | 6fef79536505be6bf3b0b4ebac70a20f24cffebb (patch) | |
| tree | 69b6cd62dc844daae742b1149b83a0480936984b | |
| parent | f55532a0c0b8bb6148f4e07853b876ef73bc69ca (diff) | |
ARM: dts: STi: STiH407: Provide generic (safe) DVFS configuration
You'll notice that the voltage cell is populated with 0's. Voltage
information is very platform specific, even depends on 'cut' and
'substrate' versions. Thus it is left blank for a generic (safe)
implementation. If other nodes/properties are provided by the
bootloader, the ST CPUFreq driver will over-ride these generic
values.
Signed-off-by: Lee Jones <[email protected]>
Signed-off-by: Maxime Coquelin <[email protected]>
| -rw-r--r-- | arch/arm/boot/dts/stih407-family.dtsi | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stih407-family.dtsi b/arch/arm/boot/dts/stih407-family.dtsi index 81f81214cdf9..9fa1e58557ef 100644 --- a/arch/arm/boot/dts/stih407-family.dtsi +++ b/arch/arm/boot/dts/stih407-family.dtsi @@ -22,15 +22,29 @@ device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <0>; + /* u-boot puts hpen in SBC dmem at 0xa4 offset */ cpu-release-addr = <0x94100A4>; + + /* kHz uV */ + operating-points = <1500000 0 + 1200000 0 + 800000 0 + 500000 0>; }; cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a9"; reg = <1>; + /* u-boot puts hpen in SBC dmem at 0xa4 offset */ cpu-release-addr = <0x94100A4>; + + /* kHz uV */ + operating-points = <1500000 0 + 1200000 0 + 800000 0 + 500000 0>; }; }; |