diff options
| author | Arun Siluvery <[email protected]> | 2016-01-21 21:43:54 +0000 |
|---|---|---|
| committer | Daniel Vetter <[email protected]> | 2016-01-25 16:49:15 +0100 |
| commit | 6ecf56ae1d20d00a010a7d6d453031e413c674b8 (patch) | |
| tree | 11d0ca0fa426006d8e71069bcb28ce72f48183f5 | |
| parent | a78536e73f35471417df1de561d8e8b83da28734 (diff) | |
drm/i915/gen9: Add WaOCLCoherentLineFlush
This is mainly required for future enabling of pre-emptive
command execution.
v2: explain purpose of change (Chris)
Reviewed-by: Nick Hoath <[email protected]>
Cc: Dave Gordon <[email protected]>
Signed-off-by: Arun Siluvery <[email protected]>
Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
Signed-off-by: Daniel Vetter <[email protected]>
| -rw-r--r-- | drivers/gpu/drm/i915/intel_ringbuffer.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index d07c6a9e7b40..6f5b511bdb5d 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -981,6 +981,10 @@ static int gen9_init_workarounds(struct intel_engine_cs *ring) /* WaDisableSTUnitPowerOptimization:skl,bxt */ WA_SET_BIT_MASKED(HALF_SLICE_CHICKEN2, GEN8_ST_PO_DISABLE); + /* WaOCLCoherentLineFlush:skl,bxt */ + I915_WRITE(GEN8_L3SQCREG4, (I915_READ(GEN8_L3SQCREG4) | + GEN8_LQSC_FLUSH_COHERENT_LINES)); + /* WaEnablePreemptionGranularityControlByUMD:skl,bxt */ ret= wa_ring_whitelist_reg(ring, GEN8_CS_CHICKEN1); if (ret) |