diff options
| author | Jacob Siverskog <[email protected]> | 2015-11-20 19:03:13 +0100 |
|---|---|---|
| committer | Stephen Boyd <[email protected]> | 2015-11-20 10:40:37 -0800 |
| commit | 6dc669a22c77ad9c812bef82e186b3ab254470cb (patch) | |
| tree | fb8aafbd3e645f5620d26f86aa456639ab01676f | |
| parent | c1de13574d7880c7321abe789ef02fa540631eaf (diff) | |
clk: si5351: Add PLL soft reset
This is according to figure 12 ("I2C Programming Procedure") in
"Si5351A/B/C Data Sheet"
(https://www.silabs.com/Support%20Documents/TechnicalDocs/Si5351-B.pdf).
Without the PLL soft reset, we were unable to get three outputs
working at the same time.
According to Silicon Labs support, performing PLL soft reset will only
be noticeable if the PLL parameters have been changed.
Signed-off-by: Jacob Siverskog <[email protected]>
Signed-off-by: Jens Rudberg <[email protected]>
Acked-by: Sebastian Hesselbarth <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
| -rw-r--r-- | drivers/clk/clk-si5351.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/clk/clk-si5351.c b/drivers/clk/clk-si5351.c index e346b223199d..850316ac8831 100644 --- a/drivers/clk/clk-si5351.c +++ b/drivers/clk/clk-si5351.c @@ -1091,6 +1091,13 @@ static int si5351_clkout_set_rate(struct clk_hw *hw, unsigned long rate, si5351_set_bits(hwdata->drvdata, SI5351_CLK0_CTRL + hwdata->num, SI5351_CLK_POWERDOWN, 0); + /* + * Do a pll soft reset on both plls, needed in some cases to get + * all outputs running. + */ + si5351_reg_write(hwdata->drvdata, SI5351_PLL_RESET, + SI5351_PLL_RESET_A | SI5351_PLL_RESET_B); + dev_dbg(&hwdata->drvdata->client->dev, "%s - %s: rdiv = %u, parent_rate = %lu, rate = %lu\n", __func__, clk_hw_get_name(hw), (1 << rdiv), |