diff options
author | Jesse Barnes <[email protected]> | 2013-11-15 09:32:12 -0800 |
---|---|---|
committer | Daniel Vetter <[email protected]> | 2013-11-28 11:02:06 +0100 |
commit | 6b88f295690d3340fcbd01c1ff46991ea4f83c9f (patch) | |
tree | d031d8a8c8b09d769cf0c596b2c1b359c3135db3 | |
parent | 2f0aa30425414f3105bc29dd39bfdb40cb684393 (diff) |
drm/i915/vlv: use parallel context restore when coming out of RC6
Setting this bit restores all ring contexts in parallel rather than
serially. Matches current BWG recommendations.
Tested-by: "Meng, Mengmeng" <[email protected]>
Signed-off-by: Jesse Barnes <[email protected]>
Reviewed-by: Deepak S <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 2 |
2 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 2658d975279b..3be449d884a7 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -4900,6 +4900,7 @@ #define GEN6_RC_CTL_RC6_ENABLE (1<<18) #define GEN6_RC_CTL_RC1e_ENABLE (1<<20) #define GEN6_RC_CTL_RC7_ENABLE (1<<22) +#define VLV_RC_CTL_CTX_RST_PARALLEL (1<<24) #define GEN7_RC_CTL_TO_MODE (1<<28) #define GEN6_RC_CTL_EI_MODE(x) ((x)<<27) #define GEN6_RC_CTL_HW_ENABLE (1<<31) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 2d74ae83b175..eac7c4eb345c 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4118,7 +4118,7 @@ static void valleyview_enable_rps(struct drm_device *dev) VLV_MEDIA_RC6_COUNT_EN | VLV_RENDER_RC6_COUNT_EN)); if (intel_enable_rc6(dev) & INTEL_RC6_ENABLE) - rc6_mode = GEN7_RC_CTL_TO_MODE; + rc6_mode = GEN7_RC_CTL_TO_MODE | VLV_RC_CTL_CTX_RST_PARALLEL; intel_print_rc6_info(dev, rc6_mode); |