diff options
| author | Mika Kuoppala <[email protected]> | 2017-03-15 18:12:59 +0200 |
|---|---|---|
| committer | Mika Kuoppala <[email protected]> | 2017-03-16 12:28:28 +0200 |
| commit | 6b7f6aa75e38ef4e2bfb9e13726f6561e682892f (patch) | |
| tree | c0028fc967d28217d8ffb5f2ef2a4de548d488bb | |
| parent | 679cb6c1320bc0d4b1572a4cf0988c3bba66becf (diff) | |
drm/i915: Use coarse grained residency counter with byt
Set byt rc residency counters high level as chv does by
default. We lose some accuracy on byt but we can do the calculation
without extra hw read on both platforms, as now they behave
identically in this respect.
v2: use ktime
v3: keep comparison u32 (Chris)
Cc: Chris Wilson <[email protected]>
Cc: Ville Syrjälä <[email protected]>
Signed-off-by: Mika Kuoppala <[email protected]>
Reviewed-by: Chris Wilson <[email protected]>
Link: http://patchwork.freedesktop.org/patch/msgid/[email protected]
| -rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 7 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 9 |
2 files changed, 4 insertions, 12 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index fcefa45162b1..ea92af229133 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c @@ -1102,11 +1102,6 @@ static u32 vlv_wa_c0_ei(struct drm_i915_private *dev_priv, u32 pm_iir) if (prev->ktime) { u64 time, c0; u32 render, media; - unsigned int mul; - - mul = 1000 * 100; /* scale to threshold% */ - if (I915_READ(VLV_COUNTER_CONTROL) & VLV_COUNT_RANGE_HIGH) - mul <<= 8; time = ktime_us_delta(now.ktime, prev->ktime); time *= dev_priv->czclk_freq; @@ -1119,7 +1114,7 @@ static u32 vlv_wa_c0_ei(struct drm_i915_private *dev_priv, u32 pm_iir) render = now.render_c0 - prev->render_c0; media = now.media_c0 - prev->media_c0; c0 = max(render, media); - c0 *= mul; + c0 *= 1000 * 100 << 8; /* to usecs and scale to threshold% */ if (c0 > time * dev_priv->rps.up_threshold) events = GEN6_PM_RP_UP_THRESHOLD; diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index dcf1b7274e14..934a8c00073a 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -6392,7 +6392,8 @@ static void valleyview_enable_rps(struct drm_i915_private *dev_priv) /* allows RC6 residency counter to work */ I915_WRITE(VLV_COUNTER_CONTROL, - _MASKED_BIT_ENABLE(VLV_MEDIA_RC0_COUNT_EN | + _MASKED_BIT_ENABLE(VLV_COUNT_RANGE_HIGH | + VLV_MEDIA_RC0_COUNT_EN | VLV_RENDER_RC0_COUNT_EN | VLV_MEDIA_RC6_COUNT_EN | VLV_RENDER_RC6_COUNT_EN)); @@ -8361,7 +8362,7 @@ static u64 vlv_residency_raw(struct drm_i915_private *dev_priv, spin_lock_irq(&dev_priv->uncore.lock); saved_ctl = I915_READ_FW(VLV_COUNTER_CONTROL); - if (!(saved_ctl & VLV_COUNT_RANGE_HIGH)) + if (WARN_ON(!(saved_ctl & VLV_COUNT_RANGE_HIGH))) I915_WRITE_FW(VLV_COUNTER_CONTROL, _MASKED_BIT_ENABLE(VLV_COUNT_RANGE_HIGH)); @@ -8382,10 +8383,6 @@ static u64 vlv_residency_raw(struct drm_i915_private *dev_priv, upper = I915_READ_FW(reg); } while (upper != tmp); - if (!(saved_ctl & VLV_COUNT_RANGE_HIGH)) - I915_WRITE_FW(VLV_COUNTER_CONTROL, - _MASKED_BIT_DISABLE(VLV_COUNT_RANGE_HIGH)); - spin_unlock_irq(&dev_priv->uncore.lock); return lower | (u64)upper << 8; |