diff options
| author | Heikki Krogerus <[email protected]> | 2015-02-02 15:37:04 +0200 |
|---|---|---|
| committer | Stephen Boyd <[email protected]> | 2015-03-12 12:18:47 -0700 |
| commit | 6b54783620bcfaff37ad41e957d29c326211cc18 (patch) | |
| tree | bbbe58b4b00f178c43aa45efefb6239a2ac00767 | |
| parent | 496eadf821c2a5111a4b1b401ddda8d1fc18fb0b (diff) | |
clk: fractional-divider: support for divider bypassing
If the divider or multiplier values are 0 in the register, bypassing the
divider and returning the parent clock rate in clk_fd_recalc_rate().
Signed-off-by: Heikki Krogerus <[email protected]>
Reviewed-by: Stephen Boyd <[email protected]>
Signed-off-by: Michael Turquette <[email protected]>
[[email protected]: fixed commitlog typo]
| -rw-r--r-- | drivers/clk/clk-fractional-divider.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/clk/clk-fractional-divider.c b/drivers/clk/clk-fractional-divider.c index 82a59d0086cc..6aa72d9d79ba 100644 --- a/drivers/clk/clk-fractional-divider.c +++ b/drivers/clk/clk-fractional-divider.c @@ -36,6 +36,9 @@ static unsigned long clk_fd_recalc_rate(struct clk_hw *hw, m = (val & fd->mmask) >> fd->mshift; n = (val & fd->nmask) >> fd->nshift; + if (!n || !m) + return parent_rate; + ret = (u64)parent_rate * m; do_div(ret, n); |