diff options
author | Anshuman Khandual <[email protected]> | 2024-07-24 09:44:28 +0530 |
---|---|---|
committer | Will Deacon <[email protected]> | 2024-08-16 11:24:55 +0100 |
commit | 6ac96d6f9a8ec3227ceb1e935aeda61bdaeb62ac (patch) | |
tree | 4ffb16bb776fefa9de27d088efc1421b4bc2fce9 | |
parent | 4b6049b643f42d5744cba685d602cd5bc79f31b3 (diff) |
arm64/mm: Drop TCR_SMP_FLAGS
Earlier TCR_SMP_FLAGS gets conditionally set as TCR_SHARED with CONFIG_SMP.
Currently CONFIG_SMP is always enabled on arm64 platforms, hence drop this
indirection via TCR_SMP_FLAGS and instead always directly use TCR_SHARED.
Cc: Catalin Marinas <[email protected]>
Cc: Will Deacon <[email protected]>
Cc: Ryan Roberts <[email protected]>
Cc: [email protected]
Cc: [email protected]
Signed-off-by: Anshuman Khandual <[email protected]>
Reviewed-by: Ryan Roberts <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Will Deacon <[email protected]>
-rw-r--r-- | arch/arm64/mm/proc.S | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/arch/arm64/mm/proc.S b/arch/arm64/mm/proc.S index f4bc6c5bac06..8abdc7fed321 100644 --- a/arch/arm64/mm/proc.S +++ b/arch/arm64/mm/proc.S @@ -36,8 +36,6 @@ #define TCR_KASLR_FLAGS 0 #endif -#define TCR_SMP_FLAGS TCR_SHARED - /* PTWs cacheable, inner/outer WBWA */ #define TCR_CACHE_FLAGS TCR_IRGN_WBWA | TCR_ORGN_WBWA @@ -469,7 +467,7 @@ SYM_FUNC_START(__cpu_setup) tcr .req x16 mov_q mair, MAIR_EL1_SET mov_q tcr, TCR_T0SZ(IDMAP_VA_BITS) | TCR_T1SZ(VA_BITS_MIN) | TCR_CACHE_FLAGS | \ - TCR_SMP_FLAGS | TCR_TG_FLAGS | TCR_KASLR_FLAGS | TCR_ASID16 | \ + TCR_SHARED | TCR_TG_FLAGS | TCR_KASLR_FLAGS | TCR_ASID16 | \ TCR_TBI0 | TCR_A1 | TCR_KASAN_SW_FLAGS | TCR_MTE_FLAGS tcr_clear_errata_bits tcr, x9, x5 |