diff options
author | Tejas Upadhyay <[email protected]> | 2023-12-05 10:51:59 +0530 |
---|---|---|
committer | Rodrigo Vivi <[email protected]> | 2023-12-21 11:45:24 -0500 |
commit | 6a1fd6787d59a1852e89a9e8863673ae4dc9a2ca (patch) | |
tree | 76a356d6edfe9cd251452a80c42f7e49e9868279 | |
parent | d8b1571312b7f77aeae2b2a7a138bb8edaa4f725 (diff) |
drm/xe/xe2: Add workaround 14019988906
This workaround applies to Graphics 20.04 as engine
workaround
V2(MattR):
- Reorder bit define
- Apply WA for RCS only
Reviewed-by: Matt Roper <[email protected]>
Signed-off-by: Tejas Upadhyay <[email protected]>
Signed-off-by: Rodrigo Vivi <[email protected]>
-rw-r--r-- | drivers/gpu/drm/xe/regs/xe_gt_regs.h | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/xe/xe_wa.c | 4 |
2 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h index d318ec0efd7d..e8dc463a49f6 100644 --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h @@ -124,6 +124,7 @@ #define SCOREBOARD_STALL_FLUSH_CONTROL REG_BIT(5) #define XEHP_PSS_CHICKEN XE_REG_MCR(0x7044, XE_REG_OPTION_MASKED) +#define FLSH_IGNORES_PSD REG_BIT(10) #define FD_END_COLLECT REG_BIT(5) #define HIZ_CHICKEN XE_REG(0x7018, XE_REG_OPTION_MASKED) diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c index 63bd4bb1af03..ce897f2d49be 100644 --- a/drivers/gpu/drm/xe/xe_wa.c +++ b/drivers/gpu/drm/xe/xe_wa.c @@ -719,6 +719,10 @@ static const struct xe_rtp_entry_sr lrc_was[] = { ENGINE_CLASS(RENDER)), XE_RTP_ACTIONS(SET(WM_CHICKEN3, HIZ_PLANE_COMPRESSION_DIS)) }, + { XE_RTP_NAME("14019988906"), + XE_RTP_RULES(GRAPHICS_VERSION(2004), ENGINE_CLASS(RENDER)), + XE_RTP_ACTIONS(SET(XEHP_PSS_CHICKEN, FLSH_IGNORES_PSD)) + }, {} }; |