diff options
| author | Tao Zhou <[email protected]> | 2022-02-10 15:46:12 +0800 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2022-02-11 16:12:07 -0500 |
| commit | 69f915cc97c4bb82b34105a47abf613f7c87215d (patch) | |
| tree | d78d970e2f8877e6d29e148f98e80089763a916a | |
| parent | f9ed188d5a08cfacb945b21976764f57c0ea9ebd (diff) | |
drm/amdgpu: loose check for umc poison mode
No need to check poison setting for each channel, check for umc0
channel0 is enough.
Signed-off-by: Tao Zhou <[email protected]>
Reviewed-by: Hawking Zhang <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/umc_v6_7.c | 18 |
1 files changed, 5 insertions, 13 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/umc_v6_7.c b/drivers/gpu/drm/amd/amdgpu/umc_v6_7.c index 47452b61b615..e613511e07e1 100644 --- a/drivers/gpu/drm/amd/amdgpu/umc_v6_7.c +++ b/drivers/gpu/drm/amd/amdgpu/umc_v6_7.c @@ -451,21 +451,13 @@ static uint32_t umc_v6_7_query_ras_poison_mode_per_channel( static bool umc_v6_7_query_ras_poison_mode(struct amdgpu_device *adev) { - uint32_t umc_inst = 0; - uint32_t ch_inst = 0; uint32_t umc_reg_offset = 0; - LOOP_UMC_INST_AND_CH(umc_inst, ch_inst) { - umc_reg_offset = get_umc_v6_7_reg_offset(adev, - umc_inst, - ch_inst); - /* Enabling fatal error in one channel will be considered - as fatal error mode */ - if (umc_v6_7_query_ras_poison_mode_per_channel(adev, umc_reg_offset)) - return false; - } - - return true; + /* Enabling fatal error in umc instance0 channel0 will be + * considered as fatal error mode + */ + umc_reg_offset = get_umc_v6_7_reg_offset(adev, 0, 0); + return !umc_v6_7_query_ras_poison_mode_per_channel(adev, umc_reg_offset); } const struct amdgpu_ras_block_hw_ops umc_v6_7_ras_hw_ops = { |