diff options
author | Kan Liang <[email protected]> | 2023-01-06 08:04:48 -0800 |
---|---|---|
committer | Ingo Molnar <[email protected]> | 2023-01-09 12:00:52 +0100 |
commit | 69ced4160969025821f2999ff92163ed26568f1c (patch) | |
tree | c158a25053f3c6f86721765012819489da994949 | |
parent | 6887a4d3aede084bf08b70fbc9736c69fce05d7f (diff) |
perf/x86/msr: Add Emerald Rapids
The same as Sapphire Rapids, the SMI_COUNT MSR is also supported on
Emerald Rapids. Add Emerald Rapids model.
Signed-off-by: Kan Liang <[email protected]>
Signed-off-by: Ingo Molnar <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
-rw-r--r-- | arch/x86/events/msr.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/x86/events/msr.c b/arch/x86/events/msr.c index 074150d28fa8..c65d8906cbcf 100644 --- a/arch/x86/events/msr.c +++ b/arch/x86/events/msr.c @@ -69,6 +69,7 @@ static bool test_intel(int idx, void *data) case INTEL_FAM6_BROADWELL_G: case INTEL_FAM6_BROADWELL_X: case INTEL_FAM6_SAPPHIRERAPIDS_X: + case INTEL_FAM6_EMERALDRAPIDS_X: case INTEL_FAM6_ATOM_SILVERMONT: case INTEL_FAM6_ATOM_SILVERMONT_D: |