diff options
| author | Andy Chiu <[email protected]> | 2022-11-17 23:40:13 +0800 |
|---|---|---|
| committer | David S. Miller <[email protected]> | 2022-11-21 10:36:03 +0000 |
| commit | 6830604ec0c73ff8ecafb48046db7332210e58fd (patch) | |
| tree | fefb7388ccfd026470cf3c9153d1e259b40eb630 | |
| parent | 29f8eefba3ba3c9a3416ee09dc868b288a09fc25 (diff) | |
dt-bindings: describe the support of "clock-frequency" in mdio
mdio bus frequency is going to be configurable at boottime by a property
in DT now, so add a description to it.
Signed-off-by: Andy Chiu <[email protected]>
Reviewed-by: Greentime Hu <[email protected]>
Reviewed-by: Andrew Lunn <[email protected]>
Acked-by: Rob Herring <[email protected]>
Signed-off-by: David S. Miller <[email protected]>
| -rw-r--r-- | Documentation/devicetree/bindings/net/xilinx_axienet.txt | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/net/xilinx_axienet.txt b/Documentation/devicetree/bindings/net/xilinx_axienet.txt index 1aa4c6006cd0..80e505a2fda1 100644 --- a/Documentation/devicetree/bindings/net/xilinx_axienet.txt +++ b/Documentation/devicetree/bindings/net/xilinx_axienet.txt @@ -68,6 +68,8 @@ Optional properties: - mdio : Child node for MDIO bus. Must be defined if PHY access is required through the core's MDIO interface (i.e. always, unless the PHY is accessed through a different bus). + Non-standard MDIO bus frequency is supported via + "clock-frequency", see mdio.yaml. - pcs-handle: Phandle to the internal PCS/PMA PHY in SGMII or 1000Base-X modes, where "pcs-handle" should be used to point |