diff options
| author | Jernej Skrabec <[email protected]> | 2018-12-08 19:02:22 +0100 |
|---|---|---|
| committer | Stephen Boyd <[email protected]> | 2018-12-10 11:19:26 -0800 |
| commit | 67ee606a6bbb5ed2df86e968b6d0d60ad6c60b76 (patch) | |
| tree | 3b9b9c0f8d275b602b69d17251c5aa7591a99c1c | |
| parent | a41f85b6017ee20952a60e4330bcae2527fe2c2a (diff) | |
clk: sunxi-ng: a64: Allow parent change for VE clock
Cedrus driver wants to set VE clock higher than it's possible without
changing parent rate.
Allow changing parent rate for VE clock, so clock rate can be set
freely.
Signed-off-by: Jernej Skrabec <[email protected]>
Acked-by: Maxime Ripard <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
| -rw-r--r-- | drivers/clk/sunxi-ng/ccu-sun50i-a64.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c index 181b599dc163..932836d26e2b 100644 --- a/drivers/clk/sunxi-ng/ccu-sun50i-a64.c +++ b/drivers/clk/sunxi-ng/ccu-sun50i-a64.c @@ -570,7 +570,7 @@ static SUNXI_CCU_M_WITH_MUX_GATE(csi_mclk_clk, "csi-mclk", csi_mclk_parents, 0x134, 0, 5, 8, 3, BIT(15), 0); static SUNXI_CCU_M_WITH_GATE(ve_clk, "ve", "pll-ve", - 0x13c, 16, 3, BIT(31), 0); + 0x13c, 16, 3, BIT(31), CLK_SET_RATE_PARENT); static SUNXI_CCU_GATE(ac_dig_clk, "ac-dig", "pll-audio", 0x140, BIT(31), CLK_SET_RATE_PARENT); |