diff options
| author | Frank Li <[email protected]> | 2024-05-31 17:50:15 -0400 |
|---|---|---|
| committer | Shawn Guo <[email protected]> | 2024-06-16 14:55:18 +0800 |
| commit | 67edf1eb1c4b6ad496f2714cb43140c19d241f9c (patch) | |
| tree | f54e3b3c05c6317cc20ff6cf9d4e14d32ab5758b | |
| parent | 9ebd81f0c73b40568749cc3ae52e3c644a3e10e4 (diff) | |
arm64: dts: ls1043a: Change I2C clock name to ipg to fix DTB_CHECK warning
dt_binding require I2C's clock name is "ipg". Change it to "ipg" from "i2c"
to fix below DTB_CHECK warning.
arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dtb: i2c@2190000: clock-names:0: 'ipg' was expecte
Signed-off-by: Frank Li <[email protected]>
Signed-off-by: Shawn Guo <[email protected]>
| -rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi index 8ee6d8c0ef61..a4a476b04ebe 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi +++ b/arch/arm64/boot/dts/freescale/fsl-ls1043a.dtsi @@ -533,7 +533,7 @@ #size-cells = <0>; reg = <0x0 0x2180000 0x0 0x10000>; interrupts = <0 56 0x4>; - clock-names = "i2c"; + clock-names = "ipg"; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>; dmas = <&edma0 1 38>, @@ -548,7 +548,7 @@ #size-cells = <0>; reg = <0x0 0x2190000 0x0 0x10000>; interrupts = <0 57 0x4>; - clock-names = "i2c"; + clock-names = "ipg"; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>; scl-gpios = <&gpio4 2 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; @@ -561,7 +561,7 @@ #size-cells = <0>; reg = <0x0 0x21a0000 0x0 0x10000>; interrupts = <0 58 0x4>; - clock-names = "i2c"; + clock-names = "ipg"; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>; scl-gpios = <&gpio4 10 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; @@ -574,7 +574,7 @@ #size-cells = <0>; reg = <0x0 0x21b0000 0x0 0x10000>; interrupts = <0 59 0x4>; - clock-names = "i2c"; + clock-names = "ipg"; clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL QORIQ_CLK_PLL_DIV(1)>; scl-gpios = <&gpio4 12 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; |