diff options
| author | Caleb Connolly <[email protected]> | 2024-06-24 14:08:36 +0200 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2024-06-25 23:24:42 -0500 |
| commit | 66d83a42f2a3f545c347a9612e9af39cc3804e9d (patch) | |
| tree | ac430a380d6ecdef733c28f54e1691205a443fa8 | |
| parent | 653f0a1e7d6123e2d6f1f9366f6093aa9b908229 (diff) | |
arm64: dts: qcom: sm6115: add resets for sdhc_1
These are documented and supported everywhere, but not described in DT.
Add them.
Signed-off-by: Caleb Connolly <[email protected]>
Reviewed-by: Dmitry Baryshkov <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Bjorn Andersson <[email protected]>
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sm6115.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm6115.dtsi b/arch/arm64/boot/dts/qcom/sm6115.dtsi index 86ac6af2ef0f..ac5f071a8db3 100644 --- a/arch/arm64/boot/dts/qcom/sm6115.dtsi +++ b/arch/arm64/boot/dts/qcom/sm6115.dtsi @@ -1088,6 +1088,8 @@ <&gcc GCC_SDCC1_ICE_CORE_CLK>; clock-names = "iface", "core", "xo", "ice"; + resets = <&gcc GCC_SDCC1_BCR>; + power-domains = <&rpmpd SM6115_VDDCX>; operating-points-v2 = <&sdhc1_opp_table>; interconnects = <&system_noc MASTER_SDCC_1 RPM_ALWAYS_TAG |