diff options
| author | Anshuman Khandual <[email protected]> | 2023-06-14 12:29:44 +0530 |
|---|---|---|
| committer | Catalin Marinas <[email protected]> | 2023-06-14 14:37:34 +0100 |
| commit | 6669697733ca50d9be9e14cdfd2318bc37d84d97 (patch) | |
| tree | 60e53adc30490010e3d9445f0610990020913a28 | |
| parent | eee64165a54e8e045fffa41950b60af51856266c (diff) | |
arm64/sysreg: Convert TRBPTR_EL1 register to automatic generation
This converts TRBPTR_EL1 register to automatic generation without
causing any functional change.
Cc: Will Deacon <[email protected]>
Cc: Marc Zyngier <[email protected]>
Cc: Mark Brown <[email protected]>
Cc: Rob Herring <[email protected]>
Cc: Suzuki K Poulose <[email protected]>
Cc: James Morse <[email protected]>
Cc: [email protected]
Cc: [email protected]
Reviewed-by: Mark Brown <[email protected]>
Signed-off-by: Anshuman Khandual <[email protected]>
Reviewed-by: Suzuki K Poulose <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Catalin Marinas <[email protected]>
| -rw-r--r-- | arch/arm64/include/asm/sysreg.h | 3 | ||||
| -rw-r--r-- | arch/arm64/tools/sysreg | 4 |
2 files changed, 4 insertions, 3 deletions
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index f97d08d8d8da..6b3204fbad22 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -227,15 +227,12 @@ /*** End of Statistical Profiling Extension ***/ -#define SYS_TRBPTR_EL1 sys_reg(3, 0, 9, 11, 1) #define SYS_TRBBASER_EL1 sys_reg(3, 0, 9, 11, 2) #define SYS_TRBSR_EL1 sys_reg(3, 0, 9, 11, 3) #define SYS_TRBMAR_EL1 sys_reg(3, 0, 9, 11, 4) #define SYS_TRBTRG_EL1 sys_reg(3, 0, 9, 11, 6) #define SYS_TRBIDR_EL1 sys_reg(3, 0, 9, 11, 7) -#define TRBPTR_EL1_PTR_MASK GENMASK_ULL(63, 0) -#define TRBPTR_EL1_PTR_SHIFT 0 #define TRBBASER_EL1_BASE_MASK GENMASK_ULL(63, 12) #define TRBBASER_EL1_BASE_SHIFT 12 #define TRBSR_EL1_EC_MASK GENMASK(31, 26) diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg index fe2490713754..ec493e43988c 100644 --- a/arch/arm64/tools/sysreg +++ b/arch/arm64/tools/sysreg @@ -2273,3 +2273,7 @@ Enum 2:1 FM EndEnum Field 0 E EndSysreg + +Sysreg TRBPTR_EL1 3 0 9 11 1 +Field 63:0 PTR +EndSysreg |