diff options
| author | Baruch Siach <[email protected]> | 2020-12-02 09:15:33 +0200 |
|---|---|---|
| committer | Bartosz Golaszewski <[email protected]> | 2020-12-02 12:08:13 +0100 |
| commit | 64b19f6abedc0b7c8087b64e49f293bc4603ac23 (patch) | |
| tree | b1bd75618e6774af32c9ba1aedfb979c85f8dc21 | |
| parent | 3cc1fb73993905b598da3802f87ac59411c52516 (diff) | |
gpio: mvebu: update Armada XP per-CPU comment
Commit 2233bf7a92e ("gpio: mvebu: switch to regmap for register access")
introduced percpu_regs to replace percpu_membase. Update the comment to
match.
Cc: Thomas Petazzoni <[email protected]>
Fixes: 2233bf7a92e7 ("gpio: mvebu: switch to regmap for register access")
Reviewed-by: Andrew Lunn <[email protected]>
Signed-off-by: Baruch Siach <[email protected]>
Signed-off-by: Bartosz Golaszewski <[email protected]>
| -rw-r--r-- | drivers/gpio/gpio-mvebu.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/drivers/gpio/gpio-mvebu.c b/drivers/gpio/gpio-mvebu.c index 433e2c3f3fd5..bdc4d813a42e 100644 --- a/drivers/gpio/gpio-mvebu.c +++ b/drivers/gpio/gpio-mvebu.c @@ -78,8 +78,7 @@ /* * The Armada XP has per-CPU registers for interrupt cause, interrupt - * mask and interrupt level mask. Those are relative to the - * percpu_membase. + * mask and interrupt level mask. Those are in percpu_regs range. */ #define GPIO_EDGE_CAUSE_ARMADAXP_OFF(cpu) ((cpu) * 0x4) #define GPIO_EDGE_MASK_ARMADAXP_OFF(cpu) (0x10 + (cpu) * 0x4) |