diff options
| author | Claudiu Beznea <[email protected]> | 2021-08-23 16:19:13 +0300 |
|---|---|---|
| committer | Nicolas Ferre <[email protected]> | 2021-09-14 16:52:26 +0200 |
| commit | 63a84d560e818f8a382a4a61bf1e59df43cdc06d (patch) | |
| tree | f84b95e3e37c361d97e66e352816179ee6672bb8 | |
| parent | 1605de1b3ca66e3eddbca4b3c353c13c26476fe2 (diff) | |
ARM: dts: at91: sama7g5: add ram controllers
Add RAM and RAMC PHY controllers. These are necessary for platform
specific power management code.
Signed-off-by: Claudiu Beznea <[email protected]>
Signed-off-by: Nicolas Ferre <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
| -rw-r--r-- | arch/arm/boot/dts/sama7g5.dtsi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sama7g5.dtsi b/arch/arm/boot/dts/sama7g5.dtsi index cc6be6db7b80..ecabab4343b6 100644 --- a/arch/arm/boot/dts/sama7g5.dtsi +++ b/arch/arm/boot/dts/sama7g5.dtsi @@ -515,6 +515,18 @@ }; }; + uddrc: uddrc@e3800000 { + compatible = "microchip,sama7g5-uddrc"; + reg = <0xe3800000 0x4000>; + status = "okay"; + }; + + ddr3phy: ddr3phy@e3804000 { + compatible = "microchip,sama7g5-ddr3phy"; + reg = <0xe3804000 0x1000>; + status = "okay"; + }; + gic: interrupt-controller@e8c11000 { compatible = "arm,cortex-a7-gic"; #interrupt-cells = <3>; |