diff options
| author | Komal Bajaj <[email protected]> | 2023-03-13 18:27:31 +0530 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2023-04-04 12:27:27 -0700 |
| commit | 6209038f131fee84ff1536dc59864f54d06740f2 (patch) | |
| tree | 960690c9ef7ebf7c74cb610de5c970e49b2ec20e | |
| parent | ec57cbce1a6d9384f8ac1ff966b204dc262f4927 (diff) | |
arm64: dts: qcom: qdu1000: Add LLCC/system-cache-controller
Add a DT node for Last level cache (aka. system cache) controller
which provides control over the last level cache present on QDU1000
and QRU1000 SoCs.
Signed-off-by: Komal Bajaj <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
| -rw-r--r-- | arch/arm64/boot/dts/qcom/qdu1000.dtsi | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi index 99d784085fb3..734438113bba 100644 --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi @@ -1321,6 +1321,18 @@ qcom,bcm-voters = <&apps_bcm_voter>; #interconnect-cells = <2>; }; + + system-cache-controller@19200000 { + compatible = "qcom,qdu1000-llcc"; + reg = <0 0x19200000 0 0xd80000>, + <0 0x1a200000 0 0x80000>, + <0 0x221c8128 0 0x4>; + reg-names = "llcc_base", + "llcc_broadcast_base", + "multi_channel_register"; + interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; + multi-ch-bit-off = <24 2>; + }; }; timer { |