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authorWenjing Liu <[email protected]>2019-01-18 18:19:51 -0500
committerAlex Deucher <[email protected]>2019-02-05 21:16:23 -0500
commit5fc0cbfad4564856ee0f323d3f88a7cff19cc3f1 (patch)
tree9b2cdce6df15dc8f7eecec6ee40663edf9d6a84e
parent8f0159122714d38f89140993eb0a070f8eeb2e9d (diff)
drm/amd/display: determine if a pipe is synced by plane state
[why] is_blanked is not a general indicator of if a pipe is synced for all asics. plane state is more accurate and applicable for all asics. [how] Remove is_blanked call and add checking plane_state against NULL instead. Signed-off-by: Wenjing Liu <[email protected]> Reviewed-by: Tony Cheng <[email protected]> Acked-by: Bhawanpreet Lakha <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
-rw-r--r--drivers/gpu/drm/amd/display/dc/core/dc.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index db8252ec3671..e0ac009f00ab 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -907,11 +907,11 @@ static void program_timing_sync(
}
}
- /* set first unblanked pipe as master */
+ /* set first pipe with plane as master */
for (j = 0; j < group_size; j++) {
struct pipe_ctx *temp;
- if (pipe_set[j]->stream_res.tg->funcs->is_blanked && !pipe_set[j]->stream_res.tg->funcs->is_blanked(pipe_set[j]->stream_res.tg)) {
+ if (pipe_set[j]->plane_state) {
if (j == 0)
break;
@@ -922,9 +922,9 @@ static void program_timing_sync(
}
}
- /* remove any other unblanked pipes as they have already been synced */
+ /* remove any other pipes with plane as they have already been synced */
for (j = j + 1; j < group_size; j++) {
- if (pipe_set[j]->stream_res.tg->funcs->is_blanked && !pipe_set[j]->stream_res.tg->funcs->is_blanked(pipe_set[j]->stream_res.tg)) {
+ if (pipe_set[j]->plane_state) {
group_size--;
pipe_set[j] = pipe_set[group_size];
j--;