diff options
| author | Mangesh Gadre <[email protected]> | 2023-12-19 22:59:16 +0800 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2024-01-03 10:30:19 -0500 |
| commit | 5eb8094a9b05ae5b3e49376a6e5a7a004cd0514f (patch) | |
| tree | 80a38a0179448f96d3c94beb97dfc0d81e661203 | |
| parent | 4d23c1be882ecb7fec6894a68c310fff74cc8bba (diff) | |
drm/amdgpu: Add register read/write debugfs support for AID's
SMN address is larger than 32 bits for registers on different AID's
Updating existing interface to support access to such registers.
Signed-off-by: Mangesh Gadre <[email protected]>
Reviewed-by: Christian König <[email protected]>
Reviewed-by: Asad Kamal <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c index 2cebf2145d9a..e485dd3357c6 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c @@ -540,7 +540,11 @@ static ssize_t amdgpu_debugfs_regs_pcie_read(struct file *f, char __user *buf, while (size) { uint32_t value; - value = RREG32_PCIE(*pos); + if (upper_32_bits(*pos)) + value = RREG32_PCIE_EXT(*pos); + else + value = RREG32_PCIE(*pos); + r = put_user(value, (uint32_t *)buf); if (r) goto out; @@ -600,7 +604,10 @@ static ssize_t amdgpu_debugfs_regs_pcie_write(struct file *f, const char __user if (r) goto out; - WREG32_PCIE(*pos, value); + if (upper_32_bits(*pos)) + WREG32_PCIE_EXT(*pos, value); + else + WREG32_PCIE(*pos, value); result += 4; buf += 4; |