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authorRex-BC Chen <[email protected]>2022-05-23 17:33:44 +0800
committerStephen Boyd <[email protected]>2022-06-15 17:24:25 -0700
commit5ea61b478f30c7083fc9048934220f20a3089782 (patch)
tree8a552cea7b29648f52bccdc17275c1b930c2d372
parenta0bc8ae5a0d7c79e376f400d989698194c6af7a1 (diff)
dt-bindings: reset: mediatek: Add infra_ao reset index for MT8186
To support reset of infra_ao, add the index of infra_ao reset of thermal/svs for MT8186. Signed-off-by: Rex-BC Chen <[email protected]> Acked-by: Rob Herring <[email protected]> Reviewed-by: NĂ­colas F. R. A. Prado <[email protected]> Reviewed-by: AngeloGioacchino Del Regno <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Stephen Boyd <[email protected]>
-rw-r--r--include/dt-bindings/reset/mt8186-resets.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/dt-bindings/reset/mt8186-resets.h b/include/dt-bindings/reset/mt8186-resets.h
index 5f850370c42c..2e9029c22f38 100644
--- a/include/dt-bindings/reset/mt8186-resets.h
+++ b/include/dt-bindings/reset/mt8186-resets.h
@@ -7,6 +7,7 @@
#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT8186
#define _DT_BINDINGS_RESET_CONTROLLER_MT8186
+/* TOPRGU resets */
#define MT8186_TOPRGU_INFRA_SW_RST 0
#define MT8186_TOPRGU_MM_SW_RST 1
#define MT8186_TOPRGU_MFG_SW_RST 2
@@ -33,4 +34,8 @@
/* MMSYS resets */
#define MT8186_MMSYS_SW0_RST_B_DISP_DSI0 19
+/* INFRA resets */
+#define MT8186_INFRA_THERMAL_CTRL_RST 0
+#define MT8186_INFRA_PTP_CTRL_RST 1
+
#endif /* _DT_BINDINGS_RESET_CONTROLLER_MT8186 */