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| author | Krzysztof Kozlowski <[email protected]> | 2023-02-02 11:44:47 +0100 |
|---|---|---|
| committer | Krzysztof Kozlowski <[email protected]> | 2023-02-03 08:14:58 +0100 |
| commit | 5c7069712c9be01d1bf9061a7ef5ce78df0af0a5 (patch) | |
| tree | eddb8242bcb5baf88f71ee602ac6e889b9e87267 | |
| parent | 913137a1cd1e792587e8ae2a43d31389fdbaddf6 (diff) | |
dt-bindings: pinctrl: qcom,sdx55: correct GPIO name pattern
The SDX55 TLMM pin controller has GPIOs 0-107, so narrow the pattern.
Acked-by: Rob Herring <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Krzysztof Kozlowski <[email protected]>
| -rw-r--r-- | Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml index add3c7e64520..a40175258495 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml @@ -55,7 +55,7 @@ $defs: List of gpio pins affected by the properties specified in this subnode. items: oneOf: - - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-6])$" + - pattern: "^gpio([0-9]|[1-9][0-9]|10[0-7])$" - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data ] minItems: 1 maxItems: 36 |