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authorMark Brown <[email protected]>2022-05-10 17:11:58 +0100
committerCatalin Marinas <[email protected]>2022-05-16 19:50:20 +0100
commit5b06dcfd9e0a5dd63ecadf9169ee92a80b063322 (patch)
treed03d220af8b2f6c49136aad959ed7de1c2204107
parentf171f9e4097d29db88a99ea96bb6c08e819a52a4 (diff)
arm64/fp: Rename SVE and SME LEN field name to _WIDTH
The SVE and SVE length configuration field LEN have constants specifying their width called _SIZE rather than the more normal _WIDTH, in preparation for automatic generation rename to _WIDTH. No functional change. Signed-off-by: Mark Brown <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Catalin Marinas <[email protected]>
-rw-r--r--arch/arm64/include/asm/sysreg.h4
-rw-r--r--arch/arm64/kernel/cpufeature.c4
2 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h
index 4d78b6aeebb4..b83808ebc58f 100644
--- a/arch/arm64/include/asm/sysreg.h
+++ b/arch/arm64/include/asm/sysreg.h
@@ -1114,14 +1114,14 @@
#define DCZID_BS_SHIFT 0
#define ZCR_ELx_LEN_SHIFT 0
-#define ZCR_ELx_LEN_SIZE 4
+#define ZCR_ELx_LEN_WIDTH 4
#define ZCR_ELx_LEN_MASK 0xf
#define SMCR_ELx_FA64_SHIFT 31
#define SMCR_ELx_FA64_MASK (1 << SMCR_ELx_FA64_SHIFT)
#define SMCR_ELx_LEN_SHIFT 0
-#define SMCR_ELx_LEN_SIZE 4
+#define SMCR_ELx_LEN_WIDTH 4
#define SMCR_ELx_LEN_MASK 0xf
#define CPACR_EL1_FPEN_EL1EN (BIT(20)) /* enable EL1 access */
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 08689362cd89..665ad380c07f 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -577,13 +577,13 @@ static const struct arm64_ftr_bits ftr_id_dfr1[] = {
static const struct arm64_ftr_bits ftr_zcr[] = {
ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE,
- ZCR_ELx_LEN_SHIFT, ZCR_ELx_LEN_SIZE, 0), /* LEN */
+ ZCR_ELx_LEN_SHIFT, ZCR_ELx_LEN_WIDTH, 0), /* LEN */
ARM64_FTR_END,
};
static const struct arm64_ftr_bits ftr_smcr[] = {
ARM64_FTR_BITS(FTR_HIDDEN, FTR_NONSTRICT, FTR_LOWER_SAFE,
- SMCR_ELx_LEN_SHIFT, SMCR_ELx_LEN_SIZE, 0), /* LEN */
+ SMCR_ELx_LEN_SHIFT, SMCR_ELx_LEN_WIDTH, 0), /* LEN */
ARM64_FTR_END,
};