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authorAngeloGioacchino Del Regno <[email protected]>2023-10-05 17:11:50 +0200
committerAngeloGioacchino Del Regno <[email protected]>2023-11-29 10:37:52 +0100
commit59fa1e51ba54e1f513985a8177969b62973f7fd5 (patch)
treef6aee3e29c799ccfa9e1456537a668e906a7be91
parent1fcda8ceb014aafd56f10b33e0077c93b5dd45d1 (diff)
arm64: dts: mediatek: mt8186: Change gpu speedbin nvmem cell name
MT8186's GPU speedbin value must be interpreted, or the value will not be meaningful. Use the correct "gpu-speedbin" nvmem cell name for the GPU speedbin to allow triggering the cell info fixup handler, hence feeding the right speedbin number to the users. Cc: [email protected] Fixes: 263d2fd02afc ("arm64: dts: mediatek: mt8186: Add GPU speed bin NVMEM cells") Reviewed-by: Chen-Yu Tsai <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: AngeloGioacchino Del Regno <[email protected]>
-rw-r--r--arch/arm64/boot/dts/mediatek/mt8186.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index f04ae70c470a..f4c4f61c779d 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -1656,7 +1656,7 @@
#address-cells = <1>;
#size-cells = <1>;
- gpu_speedbin: gpu-speed-bin@59c {
+ gpu_speedbin: gpu-speedbin@59c {
reg = <0x59c 0x4>;
bits = <0 3>;
};