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authorDmitry Rokosov <[email protected]>2024-03-20 18:54:48 +0300
committerJerome Brunet <[email protected]>2024-03-29 12:07:33 +0100
commit5995a2f26f83f09d128a56a51df6d5631a274040 (patch)
tree0e88e0c99fc86ae3a3e7c541e8a270ecabc0fd01
parent32fba1c16576324f7783d7c27b03689fa7bd9998 (diff)
clk: meson: s4: pll: determine maximum register in regmap config
When the max_register value is not set, the regmap debugfs 'registers' file does not display the entire range of the regmap. Signed-off-by: Dmitry Rokosov <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jerome Brunet <[email protected]>
-rw-r--r--drivers/clk/meson/s4-pll.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/meson/s4-pll.c b/drivers/clk/meson/s4-pll.c
index 8dfaeccaadc2..c8a95842b14c 100644
--- a/drivers/clk/meson/s4-pll.c
+++ b/drivers/clk/meson/s4-pll.c
@@ -798,6 +798,7 @@ static struct regmap_config clkc_regmap_config = {
.reg_bits = 32,
.val_bits = 32,
.reg_stride = 4,
+ .max_register = ANACTRL_HDMIPLL_CTRL0,
};
static struct meson_clk_hw_data s4_pll_clks = {