diff options
author | Tyler DiBattista <[email protected]> | 2019-04-01 15:20:44 -0400 |
---|---|---|
committer | Alex Deucher <[email protected]> | 2019-06-22 09:34:10 -0500 |
commit | 5940ff3941c8917d04b1485e9ac9ae03da498393 (patch) | |
tree | 6757fe9f01104bb2da3d4f4384321e127c1317a4 | |
parent | 6c5be4ac630805d3a3b20157a0c6421ef815fe78 (diff) |
drm/amd/display: Change Min fclk to 1.2Ghz
[Why]
Some nightly tests are failing since the new value for fclk is a
bit too low. Also, a new test for the maximum downscale case was
needed.
[How]
Updated the default value for fclk to be 1.2GHz.
Signed-off-by: Tyler DiBattista <[email protected]>
Reviewed-by: Eric Bernstein <[email protected]>
Acked-by: Bhawanpreet Lakha <[email protected]>
Acked-by: Tony Cheng <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c index c1511c9edd48..de471ca87ed7 100644 --- a/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c +++ b/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c @@ -249,8 +249,8 @@ void dcn2_update_clocks_fpga(struct clk_mgr *clk_mgr, bool safe_to_lower) { struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk; - /* Min fclk = 1GHz since all the extra scemi logic seems to run off of it */ - int fclk_adj = new_clocks->fclk_khz > 1000000 ? new_clocks->fclk_khz : 1000000; + /* Min fclk = 1.2GHz since all the extra scemi logic seems to run off of it */ + int fclk_adj = new_clocks->fclk_khz > 1200000 ? new_clocks->fclk_khz : 1200000; if (should_set_clock(safe_to_lower, new_clocks->phyclk_khz, clk_mgr->clks.phyclk_khz)) { clk_mgr->clks.phyclk_khz = new_clocks->phyclk_khz; |