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authorRomain Gantois <[email protected]>2024-03-26 14:32:11 +0100
committerJakub Kicinski <[email protected]>2024-03-28 19:21:34 -0700
commit58329b03a5957904fa2b33b3824ed19e7b42c9e9 (patch)
treecdfbad1fa2c9d8b1bd53a816f38fd217ac813971
parentf7bff228a616a7eb6cba9246e97ec4da543aa53a (diff)
net: stmmac: Signal to PHY/PCS drivers to keep RX clock on
There is a reocurring issue with stmmac controllers where the MAC fails to initialize its hardware if an RX clock signal isn't provided on the MAC/PHY link. This causes issues when PHY or PCS devices either go into suspend while cutting the RX clock or do not bring the clock signal up early enough for the MAC to initialize successfully. Set the mac_requires_rxc flag in the stmmac phylink config so that PHY/PCS drivers know to keep the RX clock up at all times. Reported-by: Clark Wang <[email protected]> Link: https://lore.kernel.org/all/[email protected]/ Reported-by: Clément Léger <[email protected]> Link: https://lore.kernel.org/linux-arm-kernel/[email protected]/ Co-developed-by: Russell King (Oracle) <[email protected]> Signed-off-by: Russell King (Oracle) <[email protected]> Signed-off-by: Romain Gantois <[email protected]> Reviewed-by: Andrew Lunn <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
-rw-r--r--drivers/net/ethernet/stmicro/stmmac/stmmac_main.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index 1ee06a6e5c22..fe3498e86de9 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -1218,6 +1218,9 @@ static int stmmac_phy_setup(struct stmmac_priv *priv)
priv->phylink_config.type = PHYLINK_NETDEV;
priv->phylink_config.mac_managed_pm = true;
+ /* Stmmac always requires an RX clock for hardware initialization */
+ priv->phylink_config.mac_requires_rxc = true;
+
mdio_bus_data = priv->plat->mdio_bus_data;
if (mdio_bus_data)
priv->phylink_config.ovr_an_inband =
@@ -3408,6 +3411,10 @@ static int stmmac_hw_setup(struct net_device *dev, bool ptp_register)
u32 chan;
int ret;
+ /* Make sure RX clock is enabled */
+ if (priv->hw->phylink_pcs)
+ phylink_pcs_pre_init(priv->phylink, priv->hw->phylink_pcs);
+
/* DMA initialization and SW reset */
ret = stmmac_init_dma_engine(priv);
if (ret < 0) {