diff options
| author | Tudor Ambarus <[email protected]> | 2022-10-25 12:02:47 +0300 |
|---|---|---|
| committer | Vinod Koul <[email protected]> | 2022-11-08 10:43:57 +0530 |
| commit | 580ee84405c27d6ed419abe4d2b3de1968abdafd (patch) | |
| tree | 2a9ed9d6c292a6a4a3a20289544fd1f595714504 | |
| parent | ef2cb4f0ce479f77607b04c4b0414bf32f863ee8 (diff) | |
dmaengine: at_hdmac: Don't allow CPU to reorder channel enable
at_hdmac uses __raw_writel for register writes. In the absence of a
barrier, the CPU may reorder the register operations.
Introduce a write memory barrier so that the CPU does not reorder the
channel enable, thus the start of the transfer, without making sure that
all the pre-required register fields are already written.
Fixes: dc78baa2b90b ("dmaengine: at_hdmac: new driver for the Atmel AHB DMA Controller")
Reported-by: Peter Rosin <[email protected]>
Signed-off-by: Tudor Ambarus <[email protected]>
Cc: [email protected]
Link: https://lore.kernel.org/lkml/[email protected]/
Acked-by: Nicolas Ferre <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
| -rw-r--r-- | drivers/dma/at_hdmac.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c index 80eeb4fb88ef..968a5aba47cd 100644 --- a/drivers/dma/at_hdmac.c +++ b/drivers/dma/at_hdmac.c @@ -256,6 +256,8 @@ static void atc_dostart(struct at_dma_chan *atchan, struct at_desc *first) ATC_SPIP_BOUNDARY(first->boundary)); channel_writel(atchan, DPIP, ATC_DPIP_HOLE(first->dst_hole) | ATC_DPIP_BOUNDARY(first->boundary)); + /* Don't allow CPU to reorder channel enable. */ + wmb(); dma_writel(atdma, CHER, atchan->mask); vdbg_dump_regs(atchan); |