diff options
| author | Adam Ford <[email protected]> | 2021-05-13 06:46:15 -0500 |
|---|---|---|
| committer | Geert Uytterhoeven <[email protected]> | 2021-05-25 10:01:28 +0200 |
| commit | 56bc54496f5d6bc638127bfc9df3742cbf0039e7 (patch) | |
| tree | ac7c7297861033d66a0f0563d9d99793fab56ae3 | |
| parent | d4ea5c61e15adb3995a9944b96e842ce7faaa450 (diff) | |
arm64: dts: renesas: beacon: Fix USB extal reference
The USB extal clock reference isn't associated to a crystal, it's
associated to a programmable clock, so remove the extal reference,
add the usb2_clksel. Since usb_extal is referenced by the versaclock,
reference it here so the usb2_clksel can get the proper clock speed
of 50MHz.
Signed-off-by: Adam Ford <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>
| -rw-r--r-- | arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi index 75355c354c38..090dc9c4f57b 100644 --- a/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi +++ b/arch/arm64/boot/dts/renesas/beacon-renesom-som.dtsi @@ -321,8 +321,10 @@ status = "okay"; }; -&usb_extal_clk { - clock-frequency = <50000000>; +&usb2_clksel { + clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>, + <&versaclock5 3>, <&usb3s0_clk>; + status = "okay"; }; &usb3s0_clk { |